GaN HEMT Knowledge Base
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Normally-off GaN: p-GaN, MIS gates, and cascodes

Power electronics wants fail-safe enhancement mode; the physics wants a polarization-induced normally-on channel.

Last updated: 2026-05-11 · static LLM wiki

Why normally-off is hard

Normally-on vs normally-off band diagrams

D-mode AlGaN/GaN: 2DEG exists at VGS=0p-GaN E-mode: 2DEG depleted at VGS=0 EFEF well below EF → ON p-GaN EC above EF → depleted Negative gate bias raises EC and pinches off the left device.Positive gate bias restores channel charge under the p-GaN gate.

A conventional AlGaN/GaN HEMT is naturally on at zero bias; p-GaN gate engineering raises/depletes the channel under the gate.

The basic AlGaN/GaN HEMT naturally forms a 2DEG at zero bias, so it is normally-on. RF designers often accept depletion-mode operation. Power electronics usually wants normally-off behavior for safe gate-drive failure modes and compatibility with existing system practices.

p-GaN gate HEMT

The most commercial enhancement-mode approach uses a p-GaN cap under the gate. The p-GaN depletes the 2DEG at zero gate bias; positive gate bias restores conduction. It is widely used in 650 V-class power GaN.

The active research problem has shifted from “can we make it normally off?” to gate lifetime and VTH stability under realistic switching. Forward gate stress, hole dynamics, Mg-related defects, p-GaN/AlGaN junction behavior, dynamic gate breakdown, and frequency-dependent degradation are all current topics.

Recessed MIS-HEMT

A recessed MIS gate removes or thins the AlGaN barrier under the gate and adds a dielectric. This can produce normally-off operation with lower gate leakage, but the etch and dielectric interface introduce traps, hysteresis, bias-temperature instability, and dielectric TDDB concerns.

Cascode

A cascode combines a normally-on GaN HEMT with a low-voltage silicon MOSFET so the external device behaves normally-off. This can simplify gate drive but creates composite dynamics: package parasitics, reverse conduction, avalanche behavior, and interaction between the Si MOSFET and GaN HEMT must be validated at system level.

Current research direction

2024–2026 research is active in fully depleted p-GaN concepts, composite GaN/AlN/AlGaN barriers, MIS-p-GaN hybrids, plasma/dielectric interface treatments, and accelerated test models for dynamic gate stress.